1. Field of Use
This invention relates to checking apparatus for digital storage systems and more particularly to systems for checking the operation of a control store system for controlling the operation of a data processing unit.
2. Prior Art
As well known, both read only control stores and writable control stores have been used for storing microprogramming information. In order to provide the reliable operation of the control store and apparatus associated therewith, various techniques have been employed for diagnosing faults within the control store and associated apparatus. Most of these techniques involve the independent testing of the control store and the associated apparatus. Those techniques which have performed self-diagnosis primarily employ diagnostic programs termed microdiagnostics which are normally incorporated as part of the total maintenance facility for performing basic test operations upon the different portions of the data processing system including the control store.
The type of testing mentioned above is normally manually initiated as a consequence of a system fault. To alleviate the problems of manual testing, one system has provided checking apparatus for verifying the operation of a microprogrammed control store automatically under the control of the microinstructions included in the control store. This type of system is disclosed in U.S. Pat. No. 3,831,148, invented by Thomas O. Holtey et al, which is assigned to the assignee of the present invention. In the case of this checking operation, parity check circuits associated with the diagnostic logic circuit perform a check upon the combination of the information pattern of each microinstruction read to the control store output register and the contents of the control store address register which verifies the correctness of the information and whether this system is being addressed properly.
Another prior art system self-checks a digital storage system for detecting faults therein. This system is disclosed in U.S. Pat. No. 3,789,204, invented by George J. Barlow, and is assigned to the same assignee as named herein. The system combines an address word for a memory location into which information is to be written with a data word that is contained in that address location and generates a parity bit for the combined words and places same into memory. When the information is accessed, the address information is subtracted from the data information to indicate the correct data information if the data parity corresponds to the original data parity.
While both systems provide for automatic detection of faults within a storage system, they do not provide for automatic checking of the associated addressing and control circuits. The operation of such circuits must be independently verified as operating properly. Further, normally, these circuits as well as the control store are checked as part of a test or diagnostic routine prior to normal system operation.
Therefore, it is a primary object of the present invention to provide apparatus for verifying the operation of a control unit.
It is a further object of the present invention to provide appratus for detecing faults within a control unit during both normal and test operations.
It is a more specific object of the present invention to provide apparatus for detecting faults occurring within the control store and the circuits associated therewith.